One x86 instruction takes 62 seconds and the leaderboard is glorious
The Assembly Hall of Shame is a GitHub repository that inverts the usual goal of instruction latency analysis: instead of finding the fastest instructions, it hunts for the absolute slowest single x86 instruction. The current champion is fxrstor64, which took 62 seconds (198 billion cycles) on an AMD Ryzen 7 5800H by loading 512 bytes of FPU state from a high-latency MMIO region while other cores saturated the PCIe fabric with competing non-posted transactions. The repo includes a full leaderboard ranking instructions from nop (1 cycle) up to the champion, with creative strategies for maximizing each instruction's latency.